Monthly Archives: January 2014

More Decoupling Layout Inductance Measurements

In my previous blog post about the inductance of some decoupling layouts, I concluded that using two 0402 capacitors would (almost) always be a better choice than using one 0306 capacitor. Andrew commented that mutual inductance might have an effect and he wanted to see measurements of layouts where two 0402 capacitors were present. Fortunately, my test layout supports that and I have now made a few extra measurements to see how two 0402s in parallel actually performs.

Here is a picture of the top side of the layout with the relevant components in color. For more details about the layout see the previous blog post.

Top view of the layout, including the shape of the power plane. Footprints not discussed in this blog post are grayed out.

Top view of the layout, including the shape of the power plane. Footprints not discussed in this blog post are grayed out.

The new combinations I tested were capacitors on:

  1. C110 and C117; two 0402s close to each other (but connected in reverse) taking up roughly the same area as one 0306.
  2. C110 and C112; two 0402s far from each other and thus without inductive coupling.
  3. The same cases as above but on the bottom side of the PCB and thus further from the planes.
  4. I also include old data for the 0306 at position C132 for comparison as well as data for the single 0402 at C112.

Case 1 might give some inductive coupling between the components and vias, especially on the bottom side where the vias are longer and the capacitors are further from the planes. The coupling should help reduce the inductance since the currents in the nearby capacitors and vias flow in opposite directions.

Here is an impedance plot comparing the impedance of one 0306 to that of two 0402s on the top side of the board.

Impedance of 0306 capacitor (blue) compared to impedance of dual 0402 capacitors (red).

Impedance of a 0306 capacitor (blue) compared to impedance of dual 0402 capacitors (red).

The dual 0402 is the winner since it has lower impedance for all frequencies. The reason it has lower impedance at low frequencies is that the combination has higher capacitance. Interestingly though, it does not quite have twice the capacitance of a single 1 µF 0306. (In my experience, 1 µF 0402 capacitors are always a bit below 1 µF and they are also much more voltage dependent than 1 µF capacitors in larger packages. So do not count on getting 1 µF of capacitance from an 0402 capacitor, especially not if you have some voltage across it.)

Below is the table with the results of the measurements. Layouts E and G were presented in the previous blog post whereas I and J are new.

E G
Layout
Desc 0402
via in pad
0.3/0.6 mm vias
C/C = 0.7 mm
0306
via in pad
0.3/0.6 mm vias
C/C = 0.7 mm
Top 0.44 nH 0.28 nH
Bottom 1.04 nH 0.62 nH
I J
Layout
Desc Dual 0402
close together
via in pad
0.3/0.6 mm vias
C/C = 0.7 mm
Dual 0402
far away
via in pad
0.3/0.6 mm vias
C/C = 0.7 mm
Top 0.24 nH 0.21 nH
Bottom 0.51 nH 0.51 nH

Observations

  • In both cases of dual 0402 layouts, the inductance was less than the inductance of the best 0306 layout, just as predicted.
  • The two 0402 that were placed close together had a slightly higher inductance on the top side than the other variant, despite the inductive coupling that should help reduce the inductance. Maybe this is measurement error or maybe the result is caused by differences in plane imperfections (anti-pads) close to the capacitors. Or perhaps it is the result of that the current going to both capacitors flows in the same part of the planes, whereas current flows in different parts of the planes when the capacitors are far away so that the plane inductances appear in parallel.
  • If the latter is the main reason for the difference in top side inductance, the fact that the bottom side inductances came out the same might be explained by the additional plane inductance being offset by the reduction in inductance caused by the inductive coupling between the (long) vias and the components that are far from the planes. The inductive coupling is likely to have a bigger effect on the bottom side since the vias are longer and the capacitors are further from the planes.

So, the prediction from the previous blog post that using 0402s is a better idea than using half as many 0306s holds up well.

Decoupling Primer

I recently published the results of measurements of the inductance of a few different decoupling layouts. This post gives the theory behind why it is desirable to keep the inductance very low.

In order to keep a supply voltage on a PCB with fast circuits stable at high frequencies (kHz to hundreds of MHz), ground and power planes are used together with decoupling (or bypassing if you will) capacitors connected between the planes. At the higher end of this spectrum, the parasitic inductance of the capacitors and the tracks and vias connecting them to the planes become dominant in determining the impedance that the decoupling provides. Each capacitor together with its tracks and vias can be accurately modeled with a simple RLC series circuit:

Model of a decoupling capacitor and its associated layout.

Model of a decoupling capacitor and its associated layout.

If the impedance of such a series RLC circuit is plotted versus frequency in a log-log plot, it looks like a V:

The impedance vs frequency of a 1 µF capacitor with 1 nH of series inductance and 10 mohm of series resistance.

The impedance (in ohms) vs frequency of a 1 µF capacitor with 1 nH of series inductance and 10 mohm of series resistance.

The left straight part of the V is where the capacitive reactance dominates. Here the impedance is halved for every doubling of the frequency.

The right straight part of the V is where the inductive reactance has taken over. Here the impedance doubles for every doubling of the frequency.

The lowest part of the V is where the capacitive and inductive impedances are equal and of opposite sign so that they cancel and the only thing maintaining a non-zero impedance is the series resistance. This is where the capacitor is series resonant and therefore as efficient as possible in performing its decoupling function. If the resistance is lower than the intersection of the extended straight lines from the inductive and capacitive parts of the curve, the lowest part of the curve will dip down deep, like in the plot above. This is typical of ceramic capacitors. If the resistance is higher than the intersection, the lowest part of the curve will be a horizontal flat region above the hypothetical crossing of the straight lines. This is typical for electrolytic capacitors.

Below is a plot of the simulated impedance vs frequency for four different capacitors. All have the same series inductance (1 nH, which is typical for a reasonably well laid out 0402 capacitor). Note that except for the area around resonance, the lower value capacitors are never better than the higher value ones, so even if a 1 µF capacitor has a resonance frequency of 5 MHz, it is better (has a lower impedance) than the 1 nF capacitor (which is resonant at 160 MHz) for all frequencies up to 100 MHz and the 1 nF capacitor is only a little better in a relatively small region around its resonance frequency).

Impedance vs frequency plots for a few capacitors with different capacitance, but same size and therefore same inductance.

Impedance vs frequency plots for a few capacitors with different capacitance (1 µF, 100 nF, 10 nF and 1 nF) but same size and therefore same inductance.

Since the inductance dominates the total capacitor impedance for such a large range of interesting decoupling frequencies, it is important to keep it as low as possible. It is also important for another reason, namely that troublesome parallel resonances are formed when paralleling capacitors of different characteristics and that the amplitude of the parallel resonances is highly dependent upon the inductance.

The planes have a relatively small capacitance, and therefore there will always be at least one parallel resonant peak when decoupling capacitors are attached to a plane. The equivalent circuit (valid up until frequencies where the plane starts to show its own resonances due to its distributed nature) of a decoupling capacitor and a plane is shown below.

Equivalent circuit of a decoupling capacitor connected to a power/ground plane pair.

Equivalent circuit of a decoupling capacitor connected to a power/ground plane pair.

Below is a plot of the total impedance of a 1 nF plane capacitance in parallel with a 1 µF decoupling capacitor with 0.5 nH (blue), 1 nH (green), 2 nH (red) and 5 nH (blue-gray) parasitic inductance. As can be seen, the inductive parts of the curves are higher for the higher inductances and also the parallel resonant peaks are higher in amplitude and lower in frequency when the decoupling capacitor has a higher inductance.

Impedance of a 1 nF plane capacitance in parallel with a 1 µF decoupling capacitor with 0.5 nH, 1 nH, 2 nH and 5 nH series inductance respectively.

Impedance of a 1 nF plane capacitance in parallel with a 1 µF decoupling capacitor with 0.5 nH, 1 nH, 2 nH and 5 nH series inductance respectively. Higher inductance gives higher peaks at lower frequencies.

So it is apparently a good idea to keep the inductance of the decoupling capacitors low. Since surface mount capacitors are essentially just small rectangular blocks without leads, their inherent inductance (although strictly not so well defined) is rather low and the PCB layout (PCB tracks and vias) can and does add significantly to the total inductance of the capacitor. It is therefore of interest to know what impact different layouts have on the inductance and in order to put somewhat hard numbers on different layouts, I designed and measured the test board described in the previous post.