Category Archives: Electronics

Voltage and Current Noise Sources in LTspice .noise Simulations

Electronics

Update 2023-03-14: Phillip D., yildi1337, has implemented the noise sources described in this blog post in easy-to-use, parameterized LTSpice components. The components are available in the following Github repo: https://github.com/yildi1337/LTspiceNoiseSources.

Update 2019-03-14: As Jason pointed out in a comment, the simulations below involving Laplace sources do not directly work in LTspice XVII. The reason seems to be that LTspice changed its behavior such that it now (incorrectly) considers nodes connected to ground via the kind of behavioral current sources used here to be floating. To remedy this without affecting the simulation results, a very large resistor (e.g. 1 GΩ) can be inserted between such nodes and ground.

There does not seem to be a direct way of adding a voltage noise or current noise source to an LTspice (or other kinds of Spice for that matter) circuit to be used in a .noise simulation. It is however possible to add noise sources to be used in .tran (time domain) simulations using behavioral sources, but this is not what this post is about. Instead it shows a method of adding white (Johnson as well as shot) and 1/f (flicker) voltage or current noise sources of the desired amplitude to be used in .noise simulations.

One case where such noise sources can be useful is when making simulation models of amplifiers (like opamps) where the input referred voltage and current noises are known from the datasheet.

The only simple noise source (that affects .noise simulations) in LTspice is a simple resistor. Other noise sources exist in semiconductor device models, but those models are more complex and messy. An ideal resistor has a voltage noise described by:

Where k is Botzmann’s constant (1.381×10-23 J/K), T is the temperature in Kelvin (300 K by default in LTspice), B is the bandwidth in Hz and R is the resistance in Ω.

A datasheet for an amplifier typically specifies the white voltage noise in units of nV/√Hz and current noise in fA/√Hz (sometimes pA/√Hz).

So, can we somehow create noisy voltage and current sources based on noisy resistors? The answer is yes, by using dependent sources. To create a white voltage noise source, we can connect the input terminals of a voltage dependent voltage source (E source) to a resistor and use a suitable scaling factor. The dependent source isolates the resistor from any circuitry that is connected to it and preserves the voltage noise amplitude regardless of load.

As mentioned above, the noise source we are trying to model is usually specified in nV/√Hz, so it would be convenient to be able to directly enter that number as part of the model. A simple way of doing that is to select a resistance that produces a noise density of 1 nV/√Hz and enter the noise amplitude from the datasheet as the voltage gain of the dependent source. Solving the above equation for vn = 1 nV when T = 300 K and B = 1 Hz gives R = 60.343 Ω.

The resulting LTspice schematic for a 4.5 nV/√Hz voltage noise source is thus:

White voltage noise source with a noise density of 4.5 nV/√Hz

Similarly, to create a white current noise source, we can use a voltage dependent current source (G source). To allow us to set the transconductance factor of the source to the noise density in fA/√Hz, we need a resistor with a noise density of 1 fV/√Hz, which means that the resistor shall have the very small value of 60.343 pΩ (piko ohm)! A current noise source with a noise density of 4 fA/√Hz can thus be modeled like this:

White current noise source with a noise density of 4 fA/√Hz

Often, one is also interested in flicker noise, whose power density is proportional to 1/f, i.e. it decreases with frequency. If the power density is proportional to 1/f, the voltage (or current) noise density is proportional to 1/√f. This makes it a bit harder to create a model for this kind of noise in LTspice, but it is still possible. The trick is to use the white current noise source above and connect it to a behavioral current source (B source) which has a Laplace function that makes it behave like an impedance whose magnitude is 1/√f. I found the documentation to be a bit unclear on behavioral sources, but after some experimentation I got the following to work:

Flicker voltage noise source with an amplitude of 1.8 nV/√Hz at 100 Hz.

The documentation for a behavioral source in LTspice says that “If an optional Laplace transform is defined, that transform is applied to the result of the behavioral current or voltage.”. It seems that applied in this case means divided by. Unexpected in my opinion.

So the way this B source works is that it produces a current that is the same as the voltage across it (divided by an implicit resistance of 1 Ω to get the units right) and this current is modified by dividing it in the Laplace/frequency domain by the Laplace expression √(s/2π). The complex frequency variable s of the Laplace transform can be written as s = σ+jω = σ+j2πf where f is the frequency in Hz (and σ is the hard-to-interpret real part of s, which can be set to 0 to essentially convert the Laplace transform into a Fourier transform). By dividing s by 2π, we get the desired behavior of an impedance whose magnitude is equal to 1/√f. This impedance is not a pure resistance, but a complex impedance that will cause a phase shift of 45 degrees between current and voltage. Phase shifts are however irrelevant when dealing with noise (unless there are multiple signal paths from a noise source to a node) and the important thing here is that the magnitude of the impedance is right. If we wanted to model a resistor with a resistance of 1/√f, we could divide s by √-1 to make the impedance real, like this: Laplace = sqrt(s/2/pi/sqrt(-1)). This would work equally well in our model for flicker noise, but the expression is bigger and clumsier without changing the noise simulation results.

The level of flicker noise is typically given in one of two ways in datasheets. Either one can read the level off a graph at some frequency where the flicker noise dominates, or it is specified as the corner frequency fc at which it is equal to the white noise level at the same node. In both cases we know the noise level at some frequency and we would of course like to be able to input these two numbers into the noise generator model. This is done by setting the noise level (at the specified frequency) as the transconductance of the G source and by setting the gain of the E source to the square root of the specified frequency. The reason we need to use the square root of the frequency is of course that the white noise current from the G source is multiplied by 1/√f by the B source and that we want to scale it back up to the same intensity precisely at fc. Multiplying the noise by √fc obviously cancels the 1/√f  factor at fc.

A flicker current noise generator can be created in a very similar manner. The only difference is that the output is produced by a G source and that the noise generating resistor is 60.343 pΩ. Here is an example:

Flicker current noise source with an amplitude of 2.3 fA/√Hz at 7000 Hz.

So let’s put all of this together and create a noise model of an opamp connected as a voltage follower like this:

Opamp voltage follower.

As an example, I selected OPA838 whose datasheet contains the following noise specifications:

OPA838 noise specifications.
OPA838 noise plots.

Here is the resulting noise model with all four noise sources (and 1TΩ resistors to make LTspice XVII happy):

OPA838 input noise model.

Link to the above LTspice schematic

The white current noise is 1000 fA/√Hz (R3, G2) and the current noise corner frequency is 7000 Hz (R4, G3, B2, G4). The white voltage noise is 1.8 nV/√Hz (R2, E2) and the voltage noise corner frequency is 100 Hz (R1, G1, B1, E1).

The 10 kΩ source resistor R5 is not part of the noise model of the opamp input itself, but is the impedance of the circuit driving the opamp input. This resistor converts the current noise into a noise voltage at the opamp input.

The out node is actually the non-inverting opamp input in this model.

A quick look at the circuit reveals that the 1 pA/√Hz times the 10 kΩ input resistor results in a noise voltage of 10 nV/√Hz, which will dominate over the much smaller 1.8 nV/√Hz white voltage noise.

Here are the simulation results from LTspice:

Noise simulation results.

The green curve is the total noise at the out node, flattening out at around 16 nV/√Hz at high frequencies. The other curves show the individual contributions from the various noise sources. Below 4 kHz, the current flicker noise (R4) dominates and above that the noise from the source resistor R5 is the largest contributor, closely followed by the white current noise (R3). In this circuit, the voltage noise sources R1 and R2 have negligible effect and even the white current noise source contributes less than what the source resistor does, so it is only below ~4 kHz that the opamp noise (in particular the current flicker noise) becomes dominant in this application. The very good voltage noise specification of OPA838 is of little value with this high a source impedance.

Another try at PCB depanelization

CNC, Electronics

I tried to separate the PCBs on another panel using the CNC mill. Here is the report on how I did it (so that I remember until next time).

The PCB panel

The first step is to have a CAD drawing in DXF format of at least where the center lines of all the cuts shall go. It is not obvious how to best lay out these lines. Should one go for fully separated PCBs? Or should one leave bridges between them to avoid the problem of PCBs (maybe) flying around as soon as they are separated, but with the problem of not getting fully separated PCBs in the end?

This time the PCBs were super-small, only 10.5 mm x 6 mm, so I decided that the holding force of the double sided tape would probably not be strong enough to securely keep the PCBs in place. Therefore I opted for only partial depanelization by milling. Since the thickness of the PCBs in this case was only 0.6 mm, I could use scissors for the final step. In fact, I could have exclusively used scissors and not involved the mill at all, but that would not be as fun. And one could argue that that would have resulted in more warping and strain on the PCBs.

To define the mill pattern, I exported data in DWG format from the CAD program (Altium) and opened it in DraftSight where I made some adjustments. After this, the CAD files contained the center lines of the mills, the board outline and the outlines of the holes in the panel. I then saved it as a DXF-file, as Fusion 360 (where I create the G-code program for the mill) does not seem to understand DWG.

In Fusion 360, I started a new sketch and used the command INSERT -> Insert DXF to import the CAD file.

DXF import dialog in Fusion 360.

Here one can select which layers to import and what units to use. In my case I only needed the data on layer MECHANICAL8 and the units were (of course) millimeters.

When the data is in, one does not have to do any more work in the MODEL section of Fusion 360, but there is more to be done in the CAM section.

Add a new setup (SETUP->New Setup) and make appropriate selections. One important thing is to define the origin in a clever position that is easy to identify and calibrate on the mill. For this purpose I had placed a 3 mm hole in the panel which I intended to locate using the 3 mm end mill needed for the depanelization (2 mm would probably have been a better idea, but I do not currently have a suitable 2 mm end mill). For some reason, Fusion 360 refused to select the center of the 3 mm circle as the origin until I first placed the origin at the end of a mill line and then retried to select the circle. Weird bug.

Defining the origin as a Sketch Point

In the Stock tab of SETUP I selected Relative size box, No additional stock and Round Up to Nearest 1 mm. This is probably unimportant since there is not even any 3D body defined, so Fusion 360 thinks the model has zero size.

In the Post Process tab, I added a suitable Program Name and Program Comment (helps with default file name and comments in the G-code).

The main trick is to use 2D contour with Compensation Type set to Off as the milling strategy in order to let the center of the mill follow the center of the lines in the drawing. This is done by 2D->2D Contour:

Adding a 2D contour milling pass

I selected the appropriate tool in the first tab (in this case a 3 mm end mill) and in the second tab I selected all the vertical segments. This is a bit tedious since drag-select does not work. The reason I only selected these segments and not the horizontal ones, is that I want the panel to stay as rigid as possible as long as possible:

Selecting all the vertical segments in the first 2D contour pass (not all segments have yet been selected above).

In the third tab, I define the heights. I generally decrease the clearance and retract heights to make the machining faster. I let the Top Height be 0 mm from Stock top and set the Bottom Height to -1 mm from the Selected contour(s) (Stock top would also have worked). This defines that the tool will go 1 mm deep (when I zero the mill on the top of the PCB), which is enough since the PCB panel is 0.6 mm thick.

Defining heights

The fourth tab is very important. This is where Compensation Type shall be set to Off so that the center of the mill tool is not offset from the lines:

Set Compensation Type to Off.

The fifth and final tab is also somewhat important. Here we need to untick the Lead-In and Lead-Out boxes to avoid undesired lateral movements of the mill that would ruin the PCBs. I also unticked the ramp box and let the tool plunge straight down:

Untick Lead-In and Lead-Out.

After clicking OK, the following tool path (yellow) was generated:

First tool path, vertical cuts

Fusion 360 reorders the segments in some more or less optimal order. The order in which the segments were selected does not seem to matter.

Duplicate the operation (to avoid a lot of repetition of settings), clear which segments are selected and select the horizontal lines:

Selection of horizontal segments

The resulting tool path looks like this:

Tool path for horizontal segments

As I mentioned, the reason for having two operations is that I wanted to mill the short segments first (to keep the panel as rigid as possible as long as possible) and with a single setup, it is impossible to control the order of the milling.

To generate the G-code, click on the Setup containing the two milling operations (so that not just one of the milling steps is selected) and then select ACTIONS->Post Process.

Fusion 360 has an irritating habit of forgetting the post processing settings when it updates itself. This results in the following error message:

Stupid post processing error message after Fusion 360 has updated itself.

Since the previous configuration has been forgotten, I have to tell it again that I do indeed have a Mach 3 mill and (very importantly) that it should not use the commands G28 and M6.

Important settings for my mill.

After the G-code has been generated (by clicking Post), it is finally time to set up the mill to do the work. I had designed the panel such that it had four 5 mm holes that fit with the T-slots of the milling table. I drilled corresponding holes in a piece of sacrificial MDF board and placed double sided tape on the board:

MDF with holes matching the panel and double sided tape.

I then put down the PCB panel on the tape:

The PCB panel has been attached to the MDF board.

It is then time to screw the panel to the table while making sure the panel edge is very parallel to the table. I had to use oversize (M6) nuts under the heads of the screws to make them fit with the T slots:

Panel in the mill.

I manually moved the mill precisely to the 3 mm hole on the left edge of the panel and zeroed the coordinates. Then it was time for action:

Milling the vertical slots.

Milling the horizontal slots.

Milling finished!

Using a pair of scissors, I cut the PCBs apart.

Individual PCBs

The result is acceptable, but not perfect. There are some burrs, which may have been caused by the end mill not being as sharp as it should have been. At first glance there seems to be a bit of mis-registration of the milling compared to the PCBs, but at least some part of  this is actually mis-registration between the overlay print and the copper. Compared to the copper, the milling seems to be very well positioned.

An idea for future improvement that I have is to not just leave a bridge between boards, but make this bridge thinner by milling down partially through the laminate. Maybe one can get away with leaving 0.3 mm or so of the material. This would make the scissor cutting easier. It is probably best to make these partial depth mill cuts first when the tape is pristine and let the full depth cuts (which can tear the PCBs somewhat loose from the tape) follow later.

Improving the Depanelization Process

CNC, Electronics

In the previous post, I wrote about using my CNC mill to depanelize PCBs. One issue  I had was that the boards were not cleanly separated from the panel since they moved away as soon as the mill broke through the tab connecting them to the panel, leaving a pointy feature.

I tried to improve this by using double sided tape to keep the boards in place:

Double sided tape on the CNC bed to keep the sacrificial board firmly in place.

The sacrificial (MDF?) board on top of the tape. The glossy surface will make it easier to remove the tape.

The PCB panel has been secured in place. There is double sided tape between it and the board. Two clamps aid in the workholding.

Milling in progress. Some boards still get loose, but some stay in place.

Separation of the upper three rows of boards complete.

The mill is not big enough to reach all boards in one setup and I tried to reuse the tape when separating the lower two rows. Due to the dust from the initial milling getting into the adhesive, this was not a great idea. Using new tape would have been better.

The sacrificial board after the panel and the top side tape have been removed. The board can be reused. The pattern created by the mill can be used to position the next panel. Even better would be to have guide holes in the PCB panel and run a mill program to create corresponding holes in the sacrificial board to aid in precise positioning of the panel.

In summary, using double sided tape to aid in the workholding is a promising idea. With the small board in this panel it was however only semi-successful since the adhesive has very little area to attach to and the PCB surface is a bit uneven due to the trace pattern. On larger boards it will probably work better.